CMOS Logic Design with FINFETS Using 32nm TECHNOLOGY
نویسندگان
چکیده
منابع مشابه
Design of a Novel Array Multiplier Using Adiabatic Logic in 32nm Cmos Technology
*Corresponding author: Email: [email protected]
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1 M.Tech student, Dept. of ECE, VLSI System Design, JNTUA, Ananthapuramu, Andhra Pradesh, India. 2Member of Technical Staff, SEER Academy, Hyderabad, India. ---------------------------------------------------------------------***--------------------------------------------------------------------Abstract Reversible logic has presented itself as a prominent technology which plays an imperative r...
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ژورنال
عنوان ژورنال: International Journal of Instrumentation Control and Automation
سال: 2011
ISSN: 2231-1890
DOI: 10.47893/ijica.2011.1006